APA   Click to copy
Kuppannagari, S. R., & Prasanna, V. K. (2015). Efficient Generation of Energy and Performance Pareto Front for FPGA Designs. In Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (pp. 273–273).

Chicago/Turabian   Click to copy
Kuppannagari, Sanmukh R, and Viktor K Prasanna. “Efficient Generation of Energy and Performance Pareto Front for FPGA Designs.” In Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 273–273, 2015.

MLA   Click to copy
Kuppannagari, Sanmukh R., and Viktor K. Prasanna. “Efficient Generation of Energy and Performance Pareto Front for FPGA Designs.” Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays, 2015, pp. 273–73.

@inproceedings{kuppannagari2015a,
  title = {Efficient Generation of Energy and Performance Pareto Front for FPGA Designs},
  year = {2015},
  pages = {273--273},
  author = {Kuppannagari, Sanmukh R and Prasanna, Viktor K},
  booktitle = {Proceedings of the 2015 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays}
}